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? semiconductor components industries, llc, 2001 november, 2001 rev. 3 publication order number: mmun2211lt1/d 1 mmun2211lt1 series preferred devices bias resistor transistor npn silicon surface mount transistor with monolithic bias resistor network this new series of digital transistors is designed to replace a single device and its external resistor bias network. the brt (bias resistor transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. the brt eliminates these individual components by integrating them into a single device. the use of a brt can reduce both system cost and board space. the device is housed in the sot-23 package which is designed for low power surface mount applications. ? simplifies circuit design ? reduces board space and component count ? the sot-23 package can be soldered using wave or reflow. the modified gull-winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die. ? available in 8 mm embossed tape and reel. use the device number to order the 7 inch/3000 unit reel. replace at1o with at3o in the device number to order the13 inch/10,000 unit reel. maximum ratings (t a = 25 c unless otherwise noted) rating symbol value unit collector-base voltage v cbo 50 vdc collector-emitter voltage v ceo 50 vdc collector current i c 100 madc total power dissipation @ t a = 25 c (note 1.) derate above 25 c p d * 200 1.6 mw mw/ c device marking and resistor values device marking r1(k) r2(k) mmun2211lt1 a8a 10 10 mmun2212lt1 a8b 22 22 mmun2213lt1 a8c 47 47 mmun2214lt1 a8d 10 47 mmun2215lt1 a8e 10 mmun2216lt1 a8f 4.7 mmun2230lt1 a8g 1.0 1.0 mmun2231lt1 a8h 2.2 2.2 mmun2232lt1 a8j 4.7 4.7 mmun2233lt1 a8k 4.7 47 mmun2234lt1 a8l 22 47 mmun2235lt1 a8m 2.2 47 mmun2238lt1 a8r 2.2 mmun2241lt1 a8u 100 1. device mounted on a fr-4 glass epoxy printed circuit board using the minimum recommended footprint. http://onsemi.com sot23 case 318 style 6 marking diagram a8x = device code x = (see table) pin 3 collector (output) pin 2 emitter (ground) pin 1 base (input) r1 r2 1 2 3 12 3 a8x preferred devices are recommended choices for future use and best overall value. device package shipping ordering information mmun2211lt1 sot23 3000/tape & reel mmun2212lt1 sot23 3000/tape & reel mmun2213lt1 sot23 3000/tape & reel mmun2214lt1 sot23 3000/tape & reel mmun2215lt1 sot23 3000/tape & reel mmun2216lt1 sot23 3000/tape & reel mmun2230lt1 sot23 3000/tape & reel mmun2231lt1 sot23 3000/tape & reel mmun2232lt1 sot23 3000/tape & reel mmun2233lt1 sot23 3000/tape & reel mmun2234lt1 sot23 3000/tape & reel mmun2235lt1 sot23 3000/tape & reel mmun2238lt1 sot23 3000/tape & reel mmun2241lt1 sot23 3000/tape & reel
mmun2211lt1 series http://onsemi.com 2 thermal characteristics rating symbol value unit thermal resistance junction-to-ambient (surface mounted) r q ja 625 c/w operating and storage temperature range t j , t stg 65 to +150 c maximum temperature for soldering purposes, time in solder bath t l 260 10 c sec electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics collector-base cutoff current (v cb = 50 v, i e = 0) i cbo 100 nadc collector-emitter cutoff current (v ce = 50 v, i b = 0) i ceo 500 nadc emitter-base cutoff current mmun2211lt1 (v eb = 6.0 v, i c = 0) mmun2212lt1 mmun2213lt1 mmun2214lt1 mmun2215lt1 mmun2216lt1 mmun2230lt1 mmun2231lt1 mmun2232lt1 mmun2233lt1 mmun2234lt1 mmun2235lt1 mmun2238lt1 mmun2241lt1 i ebo 0.5 0.2 0.1 0.2 0.9 1.9 4.3 2.3 1.5 0.18 0.13 0.2 4.0 0.1 madc collector-base breakdown voltage (i c = 10 m a, i e = 0) v (br)cbo 50 vdc collector-emitter breakdown voltage (note 2.), (i c = 2.0 ma, i b = 0) v (br)ceo 50 vdc on characteristics (note 2.) dc current gain mmun2211lt1 (v ce = 10 v, i c = 5.0 ma) mmun2212lt1 mmun2213lt1 mmun2214lt1 mmun2215lt1 mmun2216lt1 mmun2230lt1 mmun2231lt1 mmun2232lt1 mmun2233lt1 mmun2234lt1 mmun2235lt1 mmun2238lt1 mmun2241lt1 h fe 35 60 80 80 160 160 3.0 8.0 15 80 80 80 160 160 60 100 140 140 350 350 5.0 15 30 200 150 140 350 350 collector-emitter saturation voltage (i c = 10 ma, i b = 0.3 ma) (i c = 10 ma, i b = 5 ma) mmun2230lt1/mmun2231lt1 (i c = 10 ma, i b = 1 ma) mmun2215lt1/mmun2216lt1 mmun2232lt1/mmun2233lt1/mmun2234lt1/ mmun2235lt1/mmun2238lt1 v ce(sat) 0.25 vdc 2. pulse test: pulse width < 300 m s, duty cycle < 2.0%.
mmun2211lt1 series http://onsemi.com 3 electrical characteristics (t a = 25 c unless otherwise noted) (continued) characteristic symbol min typ max unit on characteristics (note 3.) output voltage (on) (v cc = 5.0 v, v b = 2.5 v, r l = 1.0 k w ) mmun2211lt1 mmun2212lt1 mmun2214lt1 mmun2215lt1 mmun2216lt1 mmun2230lt1 mmun2231lt1 mmun2232lt1 mmun2233lt1 mmun2234lt1 mmun2235lt1 mmun2238lt1 (v cc = 5.0 v, v b = 3.5 v, r l = 1.0 k w ) mmun2213lt1 (v cc = 5.0 v, v b = 5.0 v, r l = 1.0 k w ) mmun2241lt1 v ol 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 vdc output voltage (off) (v cc = 5.0 v, v b = 0.5 v, r l = 1.0 k w ) (v cc = 5.0 v, v b = 0.050 v, r l = 1.0 k w ) mmun2230lt1 (v cc = 5.0 v, v b = 0.25 v, r l = 1.0 k w ) mmun2215lt1 mmun2216lt1 mmun2233lt1 mmun2238lt1 v oh 4.9 vdc input resistor mmun2211lt1 mmun2212lt1 mmun2213lt1 mmun2214lt1 mmun2215lt1 mmun2216lt1 mmun2230lt1 mmun2231lt1 mmun2232lt1 mmun2233lt1 mmun2234lt1 mmun2235lt1 mmun2238lt1 mmun2241lt1 r1 7.0 15.4 32.9 7.0 7.0 3.3 0.7 1.5 3.3 3.3 15.4 1.54 1.54 70 10 22 47 10 10 4.7 1.0 2.2 4.7 4.7 22 2.2 2.2 100 13 28.6 61.1 13 13 6.1 1.3 2.9 6.1 6.1 28.6 2.86 2.88 130 k w resistor ratio mmun2211lt1/mmun2212lt1/mmun2213lt1 mmun2214lt1 mmun2215lt1/mmun2216lt1/mmun2238lt1 mmun2241lt1 mmun2230lt1/mmun2231lt1/mmun2232lt1 mmun2233lt1 mmun2234lt1 mmun2235lt1 r1/r2 0.8 0.17 0.8 0.055 0.38 0.038 1.0 0.21 1.0 0.1 0.47 0.047 1.2 0.25 1.2 0.185 0.56 0.056 3. pulse test: pulse width < 300 m s, duty cycle < 2.0%.
mmun2211lt1 series http://onsemi.com 4 typical electrical characteristics mmun2211lt1 100 10 1 0.1 0.01 0.001 0123 4 v in , input voltage (volts) 5678910 v o = 5 v i c, collector current (ma) t a = 25 c 75 c 25 c 1000 100 10 1 10 100 i c , collector current (ma) 50 010203040 4 3 1 2 0 v r , reverse bias voltage (volts) f = 1 mhz l e = 0 a t a = 25 c v ce = 10 v figure 1. derating curve 250 200 150 100 50 0 50 0 50 100 150 t a , ambient temperature (5 c) figure 2. v ce(sat) vs. i c p d, power dissipation (milliwatts) c ob, capacitance (pf) h fe, dc current gain (normalized) r q ja = 625 c/w t a = 75 c 25 c 25 c 10 02030 i c , collector current (ma) 10 1 0.1 40 50 figure 3. dc current gain v in, input voltage (volts) t a = 25 c 75 c 25 c v o = 0.2 v 1 0.1 0.01 0.001 02040608 0 i c , collector current (ma) i c /i b = 10 v ce(sat), maximum collector voltage (volts) t a = 25 c 75 c 25 c figure 4. output capcitance figure 5. output current vs. input voltage figure 6. input voltage vs. output current
mmun2211lt1 series http://onsemi.com 5 typical electrical characteristics mmun2212lt1 figure 7. v ce(sat) vs. i c 0.001 0.01 0.1 1 40 i c , collector current (ma) 020 6080 i c /i b = 10 v ce(sat), maximum collector voltage (volts) t a = 25 c 25 c 75 c figure 8. dc current gain 1000 10 i c , collector current (ma ) 100 10 1 100 v ce = 10 v h fe, dc current gain (normalized) t a = 75 c 25 c 25 c c ob, capacitance (pf) figure 9. output capacitance figure 10. output current vs. input voltage 100 0 v in , input voltage (volts) 10 1 0.1 0.01 0.001 246810 0 i c , collector current (ma) 100 10 1 0.1 10 20 30 40 50 figure 11. input voltage vs. output current 50 010203040 4 3 2 1 0 v r , reverse bias voltage (volts) f = 1 mhz l e = 0 a t a = 25 c v o = 5 v v o = 0.2 v i c, collector current (ma) v in, input voltage (volts) t a = 25 c 75 c 25 c t a = 25 c 75 c 25 c
mmun2211lt1 series http://onsemi.com 6 typical electrical characteristics mmun2213lt1 v ce(sat), maximum collector voltage (volts) figure 12. v ce(sat) vs. i c 0 204060 80 10 1 0.1 0.01 i c , collector current (ma) i c /i b = 10 t a = 25 c 75 c 25 c figure 13. dc current gain 1000 10 i c , collector current (ma) 100 10 1 100 v ce = 10 v h fe, dc current gain (normalized) t a = 75 c 25 c 25 c figure 14. output capacitance 50 010203040 1 0.8 0.6 0.4 0.2 0 v r , reverse bias voltage (volts) f = 1 mhz l e = 0 a t a = 25 c c ob, capacitance (pf) 024681 0 100 10 1 0.1 0.01 0.001 v in , input voltage (volts) figure 15. output current vs. input voltage v o = 5 v i c, collector current (ma) t a = 25 c 75 c 25 c t a = 25 c 75 c 25 c 100 10 1 0.1 010 203040 50 i c , collector current (ma) figure 16. input voltage vs. output current v o = 0.2 v v in, input voltage (volts) 75 c t a = 25 c 25 c
mmun2211lt1 series http://onsemi.com 7 typical electrical characteristics mmun2214lt1 figure 17. v ce(sat) vs. i c i c , collector current (ma) 020406080 1 0.1 0.01 0.001 i c /i b = 10 t a = 25 c 25 c 75 c v ce(sat), maximum collector voltage (volts) figure 18. dc current gain 1 10 100 i c , collector current (ma) v ce = 10 300 250 200 150 100 50 0 2 4 6 8 15 20 40 50 60 70 80 90 h fe, dc current gain (normalized) 25 c t a = 75 c 25 c 4 3.5 3 2.5 2 1.5 1 0.5 0 024681015 20 25 30 35 40 45 50 v r , reverse bias voltage (volts) figure 19. output capacitance f = 1 mhz l e = 0 a t a = 25 c i c, collector current (ma) c ob, capacitance (pf) 100 10 1 0246810 figure 20. output current vs. input voltage v in , input voltage (volts) v o = 5 v t a = 25 c 75 c 25 c 10 1 0.1 01020304050 figure 21. input voltage vs. output current i c , collector current (ma) v o = 0.2 v v in, input voltage (volts) t a = 25 c 75 c 25 c
mmun2211lt1 series http://onsemi.com 8 typical electrical characteristics mmun2232lt1 t a = 75 c i c /i b =10 12 1 0.1 0.001 16 8 420 i c , collector current (ma) v ce(sat), maximum collector voltage (volts) 0.01 24 28 25 c 25 c figure 22. v ce(sat) vs. i c figure 23. dc current gain v ce = 10 v 0 1000 100 25 50 10 100 1 75 i c , collector current (ma) h fe, dc current gain t a = 75 c 25 c 25 c 125 figure 24. output capacitance figure 25. output current vs. input voltage f = 1 mhz i e = 0 a t a = 25 c 0 100 10 246 1 0.1 0.01 8 0 4 3 20 2 1 0 v in, input voltage (volts) v r, reverse bias voltage (volts) i c , collector current (ma) c ob, capacitance (pf) 10 60 50 40 30 5 6 v o = 5 v 75 c t a = 25 c 25 c figure 26. output voltage vs. input current v o = 0.2 v 0 10 10 20 30 1 0.1 i c, collector current (ma) v in, input voltage (volts) t a = 25 c 75 c 25 c
mmun2211lt1 series http://onsemi.com 9 typical electrical characteristics mmun2233lt1 75 c t a = 25 c figure 27. v ce(sat) vs. i c 25 c i c /i b = 10 12 1 0.1 0.001 17 7 222 i c , collector current (ma) v ce(sat), maximum collector voltage (volts) 0.01 27 32 figure 28. dc current gain v ce = 10 v 1 1000 100 10 1 10 i c , collector current (ma) h fe, dc current gain t a = 25 c 100 75 c 25 c figure 29. output capacitance f = 1 mhz i e = 0 a t a = 25 c 0 0.5 3 20 2 1 0 v r, reverse bias voltage (volts) c ob, capacitance (pf) 10 60 50 40 30 3.5 4 1.5 2.5 figure 30. output current vs. input voltage 0 100 10 28 1 0.1 0.01 46 v in, input voltage (volts) i c , collector current (ma) v o = 5 v t a = 25 c 75 c 25 c figure 31. input voltage vs. output current v o = 0.2 v 0 10 12 18 30 1 0.1 i c, collector current (ma) t a = 25 c 624 75 c 25 c v in, input voltage (volts)
mmun2211lt1 series http://onsemi.com 10 typical applications for npn brts load +12 v figure 32. level shifter: connects 12 or 24 volt circuits to logic in out v cc isolated load from m p or other logic +12 v figure 33. open collector inverter: inverts the input signal figure 34. inexpensive, unregulated current source
mmun2211lt1 series http://onsemi.com 11 the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 225 milliwatts. information for using the sot23 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. sot23 mm inches 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 sot23 power dissipation p d = t j(max) t a r q ja p d = 150 c 25 c 556 c/w = 225 milliwatts the power dissipation of the sot23 is a function of the pad size. this can vary from the minimum pad size for soldering to a pad size given for maximum power dissipa- tion. power dissipation for a surface mount device is deter- mined by t j(max) , the maximum rated junction temperature of the die, r q ja , the thermal resistance from the device junction to ambient, and the operating temperature, t a . using the values provided on the data sheet for the sot23 package, p d can be calculated as follows: the 556 c/w for the sot23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milli- watts. there are other alternatives to achieving higher power dissipation from the sot23 package. another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad ? . using a board material such as thermal clad, an aluminum core board, the power dissipation can be doubled using the same footprint. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. there- fore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 c. ? the soldering temperature and time shall not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient shall be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling. * soldering a device without preheating can cause exces- sive thermal shock and stress which can result in damage to the device.
mmun2211lt1 series http://onsemi.com 12 step 1 preheat zone 1 ramp" step 2 vent soak" step 3 heating zones 2 & 5 ramp" step 4 heating zones 3 & 6 soak" step 5 heating zones 4 & 7 spike" step 6 vent step 7 cooling 200 c 150 c 100 c 50 c time (3 to 7 minutes total) t max solder is liquid for 40 to 80 seconds (depending on mass of assembly) 205 to 219 c peak at solder joint desired curve for low mass assemblies 100 c 150 c 160 c 140 c figure 35. typical solder heating profile desired curve for high mass assemblies 170 c for any given circuit board, there will be a group of control settings that will give the desired heat pattern. the operator must set temperatures for several heating zones, and a figure for belt speed. taken together, these control settings make up a heating aprofileo for that particular circuit board. on machines controlled by a computer, the computer remembers these profiles from one operating session to the next. figure 7 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. this profile will vary among soldering systems but it is a good starting point. factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. this profile shows temperature versus time. solder stencil guidelines prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. a solder stencil is required to screen the optimum amount of solder paste onto the footprint. the stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. the stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. typical solder heating profile the line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. the two profiles are based on a high density and a low density board. the vitronics smd310 convection/infrared reflow soldering system was used to generate this profile. the type of solder used was 62/36/2 tin lead silver with a melting point between 177189 c. when this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. the components on the board are then heated by conduction. the circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints.
mmun2211lt1 series http://onsemi.com 13 package dimensions sot23 case 31808 issue af d j k l a c b s h g v 3 1 2 dim a min max min max millimeters 0.1102 0.1197 2.80 3.04 inches b 0.0472 0.0551 1.20 1.40 c 0.0350 0.0440 0.89 1.11 d 0.0150 0.0200 0.37 0.50 g 0.0701 0.0807 1.78 2.04 h 0.0005 0.0040 0.013 0.100 j 0.0034 0.0070 0.085 0.177 k 0.0140 0.0285 0.35 0.69 l 0.0350 0.0401 0.89 1.02 s 0.0830 0.1039 2.10 2.64 v 0.0177 0.0236 0.45 0.60 style 6: pin 1. base 2. emitter 3. collector notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material.
mmun2211lt1 series http://onsemi.com 14 notes
mmun2211lt1 series http://onsemi.com 15 notes on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mmun2211lt1/d thermal clad is a trademark of the bergquist company. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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